Energy-Efficient Computation in Constrained Systems with Machine Learning Workloads

Speaker: Viveka K R

Abstract

Increasing demand for energy-efficient systems with machine learning workloads requires the exploration of various avenues for lowering consumption in energy-constrained edge devices. Memories, specifically Static Random Access Memories (SRAMs), are essential to today's system-on-chips (SoCs). In-memory computation (IMC) enables significant improvements in efficiency by combining data storage with computation. An SRAM macro is introduced to support continuous-sensing applications via simultaneous data buffering, always-on energy/area-efficient computing for continuous event detection, as well as reduced bitline activity without the need for any data prediction for energy-efficient bulk read. Secure integrated systems routinely require the generation of keys in the form of dynamic entropy from True Random Number Generators (TRNGs), and static entropy from Physically Unclonable Functions (PUFs). We introduce an SRAM with a unified TRNG and multi-bit PUF for complete in-memory dynamic and static entropy generation for low-cost security, both in terms of area and design. Applications such as sensor-rich robotics, smart surfaces and prosthetics demand electronic skin solutions with human-like tactile receptor density. Such densities are supported using a tactile sensing system with area and energy/receptor suitable for aggregation of thousands of receptors, while keeping sub-0.01mm2/receptor area efficiency and chip power to the mW range for straightforward power distribution over stretchable substrates with tens of cm2 area and long-lived untethered operation, requiring sub-µW/receptor power.

Bio

Dr. Viveka Konandur Rajanna is an Assistant Professor in the Department of Electronic Systems Engineering (DESE) at Indian Institute of Science (IISc), Bangalore. He received his M.Tech. and Ph.D. degrees from IISc in 2007 and 2016 respectively. He worked as research fellow at the National University of Singapore (NUS), before joining the institute in 2022. He worked with Analog Devices Inc, Bangalore, between 2007 to 2010, developing Blackfin DSPs. His research interests include ultra-low power VLSI circuits, in-memory computing, memory design, low-power human sensor interface and secure on-chip computing.