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A novel design framework was developed to build next-generation analog computing chipsets that could be faster and require less power than the digital chips found in most electronic devices. Using this framework, a prototype of an analog chipset called ARYABHAT-1 (Analog Reconfigurable technologY And Bias-scalable Hardware for AI Tasks) was built. This type of chipset can be especially helpful for artificial intelligence (AI)-based applications such as object or speech recognition – think Alexa or Siri – or those that require massive parallel computing operations at high speeds.
Most electronic devices, particularly those that involve computing, use digital chips because the design process is simple and scalable. But the advantage of analog is huge, getting orders of magnitude improvement in power and size. In applications that don’t require precise calculations, analog computing has the potential to outperform digital computing as the former is more energy-efficient.
However, there are several technology hurdles to overcome while designing analog chips. Unlike digital chips, testing and co-design of analog processors is difficult. Large-scale digital processors can be easily synthesised by compiling a high-level code, and the same design can be ported across different generations of technology development – say, from a 7 nm chipset to a 3 nm chipset – with minimal modifications. Because analog chips do not scale easily – they need to be individually customised when transitioning to the next generation technology or to a new application – their design is expensive. Another challenge is that trading off precision and speed with power and area is not easy when it comes to analog design. In digital design, simply adding more components like logic units to the same chip can increase precision, and the power at which they operate can be adjusted without affecting the device performance.
To overcome these challenges, a novel framework was designed – this allows the development of analog processors which scale just like digital processors. Their chipset can be reconfigured and programmed so that the same analog modules can be ported across different generations of process design and across different applications. The same kind of chip can be synthesised at either 180 nm or at 7 nm, just like digital design.
Different machine learning architectures can be programmed on ARYABHAT, and like digital processors, can operate robustly across a wide range of temperatures. The architecture is also ‘bias-scalable’ – its performance remains the same when the operating conditions like voltage or current are modified. This means that the same chipset can be configured for either ultra-energy-efficient Internet of Things (IoT) applications or for high-speed tasks such as object detection.
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