Title: High-frequency Magnetics: Enabling Frequency Innovation in Passive Devices
Speaker: Dr. Ranajit Sai, Visiting professor, CeNSE, IISc, Bengaluru.
Time: 4:30 pm 16th April Tuesday
Venue: EE MMCR
Abstract: From connected thermostats to self-driving vehicles, billions of connected devices will be transforming our lives in the era of IoT and 5G. This burst in device number demands more efficient power electronics. A (r)evolution in power electronics is on the horizon as the demand for smart power management systems, both in profile and performance, for all devices is skyrocketing. With the wide bandgap semiconductor technology maturing, power semiconductors are now driving a paradigm shift in power electronics – power-supply-on-board to power-supply-on-chip (PwrSoC). However, one of the biggest obstacles is the inductor – both for its size and performance. A proper design of the magnetics can solve some of the problems and push the technology further. On the other hand, hard-switching power converters are a known source of high-frequency harmonic noise that is strong enough even in the GHz frequency regime to affect the sensitive analog blocks of the RF front-end. As inter-component spacing is diminishing due to the increase in device density, electromagnetic interference among devices is on the rise. Therefore, a proper EMI/EMC design along with a proper understanding of radiated and conducted noise is essential – both from the perspective of noise source and noise victim. Here again, magnetics can be the savior – by absorbing radiated noise owing to the loss component of permeability, thereby addressing on-chip EMC/EMI issues. This talk will sketch the recent trends and pain-points of both inductor design for PwrSoC and electromagnetic noise handling in the age of IoT. In the first part of the talk, I’ll discuss the design and development of a ferrite-core on-chip inductor. I will demonstrate that it was necessary not only to delve into the crystal structure of ferrites to achieve desired core characteristics but also to develop a new deposition technique to get that ferrite deposited on-chip in a CMOS-compatible manner. In the second part of the talk, I will focus on the assessment of the impact of EM noise radiated from an EV-grade power converter to a nearby mobile communication system. I’ll also demonstrate the development of an EM noise suppressor and integration of the same as a critical component of a communication chip. Finally, in the third part of the talk, I’ll illustrate the immediate and long-term direction of my research, drawing upon my training in the field of magnetics and microfabrication, before concluding my talk with a teaching plan.
Brief Biography: Dr. Ranajit Sai received his PhD in an interdisciplinary program – Nanoengineering for Integrated Systems from IISc in 2014, in which he designed and developed an on-chip ferrite-core inductor for which an US patent has been granted. After his graduation, Dr. Sai joined Tohoku University in Sendai, Japan as an assistant professor – elevated from his brief six-month stint as a postdoc there – and served in the Dept. of Electrical Engg. for three years and in an interdisciplinary centre, NICHe, for eight months. Since February 2018 he has been affiliated to CeNSE at IISc as a visiting professor. His area of research includes high frequency passive devices such as power and RF inductors, electromagnetic noise suppressors, skin-effect-free meta-conductors. Dr. Sai has more than 10 years’ experience in the design and development of ferrite-core on-chip inductors and demonstrated the first such inductor to be operated at up to 10 GHz with the highest inductance density ever reported. He is active also in assessing the impact of electromagnetic noise radiated from the EV-grade power converters on 5G bands and in providing solutions for the suppression of that radiated noise. He has more than 40 journal and conference publications, and one patent to his name.